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CODES+ISSS proceedings

International Conference on Hardware/Software Co-design and System Synthesis

Deadlines for CODES+ISSS

Papers in 2025

12

Papers, all years

49

Years indexed

4

Since

2022

Papers in main proceedings (DBLP)

Counts papers published in the venue's main DBLP volume each year. This is not an official acceptance count: it can include short papers and exclude workshop or companion volumes.

verified volumein progressnot yet verifiedClick a bar to open that year.

202512 papers✓ verified

International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2025, Taipei, Taiwan, September 28 - Oct. 3, 2025

Proceedings ↗DBLP ↗

Keywords

Phrases from paper titles, weighted against all venues so each venue's distinctive terms rise to the top.

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Year by year

YearPapers (DBLP)StatusRead the proceedings
12✓ verifiedProceedings ↗DBLP ↗
12✓ verifiedProceedings ↗DBLP ↗
14✓ verifiedProceedings ↗DBLP ↗
11✓ verifiedProceedings ↗DBLP ↗

Who publishes here

2024 to 2025 · papers count once per institution on them

Academia 87%Industry 6%Government and other 8%

Institutions

  1. 1University of North Carolina at Chapel Hill🇺🇸2
  2. 2Ritsumeikan University🇯🇵2
  3. 3Colorado State University🇺🇸2
  4. 4University of Notre Dame🇺🇸1
  5. 5University of Essex🇬🇧1
  6. 6Google (United States)🇺🇸1
  7. 7Georgia Institute of Technology🇺🇸1
  8. 8Los Alamos National Laboratory🇺🇸1
  9. 9Harvard University🇺🇸1
  10. 10North Carolina State University🇺🇸1
  11. 11TU Wien🇦🇹1
  12. 12University of Antwerp🇧🇪1

Countries

  1. China3
  2. United States3
  3. Taiwan2
  4. Germany1
  5. France1
  6. Hong Kong SAR China1
  7. India1
  8. Japan1
  9. New Zealand1

Affiliations from OpenAlex for the papers DBLP lists. A paper with authors from three institutions counts for each of them; the split above is over the top institutions.

Venues like CODES+ISSS

Closest by the phrases in their paper titles over the last five complete years.

  1. GLSVLSI Great Lakes Symposium on VLSI0.23acceleratorin-memoryhardwareacceleratorshyperdimensional
  2. DATE Design, Automation & Test in Europe0.23acceleratoracceleratorshyperdimensionalhardwarein-memory
  3. ASP-DAC Asia and South Pacific Design Automation Conference0.22acceleratoracceleratorshardwarein-memoryhyperdimensional
  4. HPCA IEEE International Symposium on High-Performance Computer Architecture0.22acceleratoracceleratorsaccelerationnon-volatileprocessing
  5. FCCM IEEE Symposium on Field-Programmable Custom Computing Machines0.20fpga-basedacceleratoracceleratorsaccelerationhardware

Authors

From DBLP author lists of the main volume. Names appear as DBLP lists them.

Authors per paper

5.7 in 2025

4.65.36.02022: 5.52023: 5.12024: 5.12025: 5.720222025

Papers by an entirely new team

Needs a few more years of history.

Most published at CODES+ISSS

  1. Chao Wang2022 to 20255
  2. Lei Gong2022 to 20254
  3. Xuehai Zhou2022 to 20254
  4. Sudeep Pasricha2023 to 20243
  5. Hussam Amrouch2022 to 20232
  6. Paul R. Genssler2022 to 20232
  7. Xi Li2022 to 20232
  8. Zhendong Zheng2022 to 20252
  9. Rebecca Pelke2023 to 20232
  10. Rainer Leupers2023 to 20232